Miniaturization of all electronic products is an unavoidable trend in this modern world. While the scales of the semiconductor chips continuously get smaller, the scale of the related technology for packaging needs to be microminiaturized to follow the scale of the semiconductor chip is also unavoidably getting smaller. Today, because the integration of integrated circuits has been greatly increased, using a multi-layer substrate to package different kinds of chip devices is necessary to integrate different kinds of functions to obtain a high performance integration system consequentially. For example, an integration system may comprise many kinds of chip devices, such as a logic circuit component, a memory, an analog component, an optoelectronic component, a micro-electric mechanical component or a luminous component. Generally, the kinds of chip devices need to connect with each other through one shared package substrate (such as a mainboard) according to prior arts. That is, if one chip device can be connected to another chip device directly, then the package integration can be increased to microminiaturize the entire system further. A Stacked Chip Scale Package (SCSP) is proposed to package several chips nowadays, and it is called a 3D-package. However, such a 3D-package concept is limited in a rigid system package.
For meeting the variety of modern electronic production, a flexible multi-layer substrate or a non-flat substrate can be used for high density package. According to prior arts, the connection for two independent multi-layer substrates is established through connectors or through one shared package substrate. Therefore, for corresponding to a flexible or irregular package to increase integration complexity and reducing package volume, even applying for a System-In-Package, connection becomes a great topic and a challenge for the package technology today.
Therefore, development of a method of manufacturing a hybrid structure of the multi-layer substrates and the hybrid structure thereof to connect different kinds of chip devices directly without a shared package substrate, which will reduce the package volume of the entire system, hence increases the package integration and provides a flexible package. Accordingly, microminiaturization of the entire system can be achieved.